1. Field of the Invention
The present invention relates to a method of forming an opening on a semiconductor substrate, and especially to a method of forming an opening by using boron nitride as a hard mask such that the phenomenon of line distortion in conventional damascene processes can be prevented.
2. Description of the Prior Art
Damascene interconnect processes incorporated with copper are known in the art, which are also referred to as “copper damascene processes” in the semiconductor industry. Generally, the copper damascene processes are categorized into single damascene process and dual damascene process. Because the dual damascene has advantages of simplified processes, lower contact resistance between wires and plugs, and improved reliance, it is widely applied in a damascene interconnect technique. In addition, for reducing resistance and parasitic capacitance of the multi-level interconnect and improving speed of signal transmission, the dual damascene interconnect in the state-of-the-art is fabricated by filling a trench or via patterns located in a dielectric layer that comprises a low-K material with copper and performing a planarization process to obtain a metal interconnect. According to the patterns located in the dielectric layer, the dual damascene processes are categorized into trench-first processes, via-first processes, partial-via-first processes, and self-aligned processes.
In conventional damascene processes, the hard mask usually includes a compressive stress which can reach to about −500 mega Pascal (MPa). When the compressive stress is directly applied to the below dielectric layer, which has low mechanical strength and tensile stress, a phenomenon of line distortion will occur on the dielectric layer. The trenches or the vias which should be originally straight will become wiggling, therefore affecting the quality of the products in the subsequent metallization process.